Design, Optimization, and Numerical Simulation of a Simultaneous 3-dB Power Splitter for Three Guided Modes Based on Ψ-Junction Coupler Structure and 2×2 Multimode Interference Coupler Using SOI Waveguides For Applications in Photonic Neural Networks

Abstract

In this paper, we present a numerical simulation design of a 1:2 power splitter optical circuit with an evenly distributed 50:50 splitting ratio for all three modes simultaneously. The proposed design is based on the SOI material platform with wafers having a silicon layer thickness of 220nm, in accordance with VLSI chip manufacturing technology standards. The entire geometric structure is optimized and the optical performance is evaluated using the 3D-BPM numerical simulation method. Simulation results show that the proposed structure exhibits low insertion loss (I.L) with variations of less than 5dB over a 100nm bandwidth. Additionally, the proposed structure demonstrates relatively high tolerance, corresponding to relative tolerances in width and height achieved as ΔW=±20nm and Δh=±10nm, respectively, with the overshoot of I.L not exceeding 1.5dB. The entire structure occupies a small integrated space of only 10μm x 50μm. These advantageous optical performance features thus lead to promising potential for photonic integrated circuits in applications aimed at constructing versatile functional components for large-scale photonic integrated circuits, as well as for establishing independent operational neural networks integrated with broadband mode-division multiplexing (MDM) channel.